EE PLD, 25 ns, CPGA84

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Product Information

Terminal Finish	NOT SPECIFIED
Terminal Pitch	2.54 mm
Clock Freq-Max (fclk)	38 MHz
Programmable Logic Type	EE PLD
Terminal Form	PIN/PEG
Operating Temperature-Max	125 Cel
Output Function	MACROCELL
Supply Voltage-Nom (Vsup)	5 V
Temperature Grade	MILITARY
Package Shape	SQUARE
Status	ACTIVE
Operating Temperature-Min	-55 Cel
Package Body Material	CERAMIC, METAL-SEALED COFIRED
Propagation Delay (tpd)	25 ns
Number of Functions	1
Number of Dedicated Inputs	8
Supply Voltage-Max (Vsup)	5.5 V
Supply Voltage-Min (Vsup)	4.5 V
Organization	8 DEDICATED INPUTS, 64 I/O
Mfr Package Description	CERAMIC, PGA-84
Number of Terminals	84
Number of I/O Lines	64
Terminal Position	PERPENDICULAR
Technology	CMOS
Package Style	GRID ARRAY

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