EE PLD, 10 ns, PBGA280

実際の商品は画像と異なる場合があります

商品情報

Terminal Finish	TIN LEAD
Terminal Pitch	0.8000 mm
Clock Freq-Max (fclk)	105 MHz
Programmable Logic Type	EE PLD
Terminal Fまたはm	BALL
Operating Temperature-Max	70 Cel
Output Function	MACROCELL
Supply Voltage-Nom (Vsup)	3.3 V
Temperature Grade	COMMERCIAL
Package Shape	SQUARE
Status	ACTIVE
Operating Temperature-Min	0.0 Cel
Package Body Material	PLASTIC/EPOXY
Propagation Delay (tpd)	10 ns
Number of Functions	1
Number of Dedicated Inputs	0.0
Supply Voltage-Max (Vsup)	3.6 V
Supply Voltage-Min (Vsup)	3 V
Organization	0 DEDICATED INPUTS, 164 I/O
Surface Mount	Yes
Mfr Package Description	0.80 MM PITCH, CSP-280
Number of Terminals	280
Number of I/O Lines	164
Terminal Position	BOTTOM
Technology	CMOS
Package Style	GRID ARRAY, THIN PROFILE, FINE PITCH

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